A guide covering the RISC-V Architecture including the applications, libraries and tools that will make you a better and more efficient developer with the RISC-V ISA.

Models of RISC-V boards

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Checkout the StarFive VisionFive 8GB RISC-V SBC

StarFive VisionFive Hardware Specs

CPU: U74 Dual-Core with 2MB L2 cache, running at 1.0GHz. The SoC includes Vision DSP Tensilica-VP6 for computing vision at 600MHz (VPU), an NVIDIA Deep Learning Accelerator, and a neural network engine.

Memory: 8GB LPDDR4 RAM (2x 4GB clocked at 2800MHz)

User I/O

  • 4 x USB3.0 Ports, Gigabit Ethernet, Audio jack
  • 40 Pin GPIO Header (28 x GPIO, I2C, I2S, SPI, UART)

Networking: Wi-Fi and Bluetooth 4.2

Linux Ready including Fedora.

Checkout the HiFive Unmatched Developement board (Discontinued as of January 2022)

HiFive Unmatched Hardware Specs

SoC: SiFive Freedom U740 SoC

Memory: 16GB DDR4

Flash Memory: 32MB Quad SPI Flash

Removable Storage: MicroSD Card

Networking: Gigabit Ethernet Port

User I/O

  • 4x USB 3.2 Gen 1 Type A Ports (1 Charging Port)

  • 1x MicroUSB Console Port

Expansion Capabilities

  • x16 PCIe® Gen 3 Expansion Slot (8-lanes Useable)

  • M.2 M-Key Slot (PCIe Gen 3 x4) for NVME 2280 SSD Module

  • M.2 E-Key Slot (PCIe Gen 3 x1) for Wi-Fi / Bluetooth Module

Board Form Factor: Industry Standard Mini-ITX

Checkout the HiFive1 Rev B Developement board

HiFive1 Rev B Hardware Specs

Microcontroller: FE310-G002

Operating Voltage: 3.3 V and 1.8 V

Input Voltage: 5 V USB or 7-12 VDC Jack

IO Voltage: 3.3 V

Digital I/O Pins: 19

PWM Pins: 9

SPI Controllers/HW CS Pins: 1/3

UART: 2

I2C: 1

Networking: WiFi/BT (off-chip)

External Interrupt Pins: 19

External Wakeup Pins: 1

Flash Memory: 32 Mbit Off-Chip (ISSI SPI Flash)

Host Interface (microUSB): Program, Debug, and Serial Communication

Checkout the Sipeed Maixduino Kit for RISC-V AI + IoT

MAIX AI module

Sipeed Maixduino Kit Hardware Specs

  • CPU: RISC-V Dual Core 64bit, with FPU; 400MHz neural network processor

  • QVGA@60FPS/VGA@30FPS image identification

  • Onboard ESP32 module support 2.4G 802.11. b/g/n and Bluetooth 4.2

  • Arduino Uno form factor, Arduino compatible interface

  • Onboard omnidirectional I2S digital output MEMS Microphone

  • 24P 0.5mm FPC connector for DVP Camera

  • 8-bit MCU LCD 24P 0.5mm FPC connector

  • Support self-elastic micro SD card holder

  • High performance microphone array processor for machine hearing

  • Support MaixPy IDE, Arduino IDE, OpenMV IDE, and PlatformIO IDE

  • Support Tiny-Yolo, Mobilenet and TensorFlow Lite for deep learning

Checkout the RTG4 Development Kit board from Microsemi

RTG4 Development Kit Hardware Specs

  • Two 1GB DDR3 synchronous dynamic random access memory (SDRAM)

  • 2GB SPI flash memory

  • PCI Express Gen 1 x1 interface

  • PCIe x4 edge connector

  • One pair SMA connectors for testing of the full-duplex SERDES channel

  • Two FMC connectors with HPC/LPC pinout for expansion

  • RJ45 interface for 10/100/1000 Ethernet

  • USB micro-AB connector

  • Headers for SPI, GPIOs

  • FTDI programmer interface to program the external SPI flash

  • JTAG programming interface

Checkout the Espressif ESP32-C3

Espressif ESP32-C3 is a single-core Wi-Fi and Bluetooth 5 (LE) microcontroller SoC, based on the open-source RISC-V architecture. It has the right balance of power, I/O capabilities and security, thus offering the optimal cost-effective solution for connected devices. The availability of Wi-Fi and Bluetooth 5 (LE) connectivity not only makes the device’s configuration easy, but it also facilitates a variety of use-cases based on dual connectivity.


Espressif ESP32-C3 Hardware Specs:

  • 32-bit core RISC-V microcontroller with a maximum clock speed of 160 MHz.
  • 22 configurable GPIOs.
  • 400 KB of internal RAM.
  • Low-power-mode support.
  • RSA-3072-based secure boot.
  • AES-128/256-XTS-based flash encryption.
  • Wi-Fi and Bluetooth 5 (LE).

Espressif ESP32-C3-DevKitC-02 is an entry-level development board based on ESP32-C3-WROOM-02, a general-purpose module with 4 MB SPI flash. This board integrates complete Wi-Fi and Bluetooth LE functions.


ESP32-C3-DevKitC-02

Espressif ESP32-C3-DevKitM-1 is an entry-level development board based on ESP32-C3-MINI-1, a module named for its small size. This board integrates complete Wi-Fi and Bluetooth LE functions.


ESP32-C3-DevKitM-1

RISC-V Learning Resources

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RISC-V Foundation is a non-profit corporation controlled by its 500 members(NVIDIA, Google, Samsung, Raspberry Pi, SiFive, Canonical, and Western Digital) to drive forward the adoption and implementation of the free and open RISC-V instruction set architecture (ISA).

SiFive is a semiconductor company that produces complete RISC-V processors IP with pre-integrated SiFive Shield, for whole SoC security, and SiFive Insight advanced trace and debug.

IAR Systems is a company that enables Linux-based Continuous Integration and automated workflows for embedded systems(ARM & RISC-V).

Developer Resources

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Learning/Training Courses

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### Books Back to the Top

RISC-V Operating Systems

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Running 32-bit & 64-bit RISC-V Linux on QEMU

RISC-V Tools

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Rocket Chip Generator is a repository contains the Rocket chip generator necessary to instantiate the RISC-V Rocket Core.

CORE-V CVA6 is an application class 6-stage RISC-V CPU capable of booting Linux.

Cores-SweRV is the EH1 RISC-V SweRV CoreTM 1.9 from Western Digital.

VRoom is a new high-end RISC-V CPU implementation.

FireSim is an open-source cycle-accurate FPGA-accelerated full-system hardware simulation platform that runs on cloud FPGAs (Amazon EC2 F1).

Nuclei Software Development Kit(Nuclei SDK) is a toolkit for developing and evaluating software using our FPGA evaluation board.

GAP SDK is set of tools and libraries that allows you to compile and execute applications on the GAP IoT Application Processor. This SDK provides a development environment for the GAP series processors.

RISC-V Studio™ Integrated Development Environment (IDE) is a flexible and highly configurable software environment that helps the RISC-V developers discover, configure, develop, debug and deploy system designs utilizing open-source and commercial RISC-V IPs and platforms.

Ashling RiscFree™ C/C++ for RISC-V is a fully integrated development tool environment that includes an IDE, compiler, debugger, and Opella-XD JTAG probe ready to use with SiFive’s RISC-V Core IP products.

RISCVEMU is a system emulator developed by Fabrice Bellard for the RISC-V architecture. Its purpose is to be small and simple while being complete. Among its features are the support of 128 bit addressing and 128 bit floating point which makes the emulator ready for the future.

RISC-V Interpreter is a online Interpreter for RISC-V build by Cornell University.

Chipyard is an open source framework for agile development of Chisel-based systems-on-chip. It will allow you to leverage the Chisel HDL, Rocket Chip SoC generator, and other Berkeley projects to produce a RISC-V SoC with everything from MMIO-mapped peripherals to custom accelerators.

BRISC-V Explorer is a RISC-V CPU simulator application that runs in a browser allowing users to easily run it on Windows, Linux or Mac. In the BRISC-V Explorer, users can

    1. Select their desired core type.
    1. Enter parameters such as memory size for that core.
    1. Configure cache parameters including block size and associativity.

Ripes is a graphical processor simulator and assembly editor for the RISC-V instruction set architecture(ISA).

OpenHW Group’s RISC-V Virtual Machine (riscv_vm) is a set of instructions to import Ubuntu guest Virtual Machine for RISC-V development for the VEGA board. It’s intended for anyone wanting to study, configure as-preferred, modify, implement or release hardware based the RISC-V Instruction Set Architecture. The VM is preconfigured for RISC-V HW development.

The Eclipse Embedded CDT is a collection of plug-ins for Arm & RISC-V C/C++ developers.

PlatformIO is a professional collaborative platform for embedded development with no vendor lock-in. It provides support for multiplatforms and frameworks such as IoT, Arduino, CMSIS, ESP-IDF, FreeRTOS, libOpenCM3, mbed OS, Pulp OS, SPL, STM32Cube, Zephyr RTOS, ARM, AVR, Espressif (ESP8266/ESP32), FPGA, MCS-51 (8051), MSP430, Nordic (nRF51/nRF52), NXP i.MX RT, PIC32, RISC-V.

PlatformIO for VSCode is a plugin that provides support for the PlatformIO IDE on VSCode.

Tock is an embedded operating system designed for running multiple concurrent, mutually distrustful applications on Cortex-M and RISC-V based embedded platforms. Tock’s design centers around protection, both from potentially malicious applications and from device drivers.

TinyGo is a Go compiler(based on LLVM) intended for use in small places such as microcontrollers, WebAssembly (Wasm), and command-line tools.

LLVM is a library that has collection of modular/reusable compiler and toolchain components (assemblers, compilers, debuggers, etc.). With these components LLVM can be used as a compiler framework, providing a front-end(parser and lexer) and a back-end (code that converts LLVM’s representation to actual machine code).

Unicorn is a lightweight, multi-platform, multi-architecture CPU emulator framework(ARM, AArch64, M68K, Mips, Sparc, X86) based on QEMU.

Keystone is a lightweight multi-platform, multi-architecture(Arm, Arm64, Hexagon, Mips, PowerPC, Sparc, SystemZ & X86) assembler framework.

Reko is a decompiler for machine code binaries.

Renode is Antmicro’s virtual development framework for multinode embedded networks (both wired and wireless) and is intended to enable a scalable workflow for creating effective, tested and secure IoT systems.

Jupiter is an open source and education-oriented RISC-V assembler and runtime simulator written in Java.

RISC-V Rust is a RISC-V processor and peripheral devices emulator project written in Rust and compiled to WebAssembly.

Diosix is a lightweight, secure, multiprocessor bare-metal hypervisor written in Rust for RISC-V.

Maixpy is designed to make AIOT programming easier with Micropython running on the embedded AIOT chip K210.

DarkRISCV is an open souce RISC-V cpu core implemented in Verilog from scratch.

FPGA Development

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Models of FPGA Boards

Checkout the PolarFire® FPGA Development Kits

Checkout the Artix 7 FPGA Development board

Checkout the Spartan 6 FPGA Development board

Checkout the Zynq-7000 for ARM/FPGA SoC Development board

FPGA Learning Resources

FPGA(Field Programmable Gate Arrays) are semiconductor devices that are based around a matrix of configurable logic blocks (CLBs) connected via programmable interconnects. FPGAs can be reprogrammed to desired application or functionality requirements after manufacturing.

TinyFPGA is a new series of boards that are low-cost, open source FPGA boards in a tiny form factor.

SiFive FPGA shells

FPGA & SoC Design Tools from Microsemi

QuickLogic Embedded FPGA (eFPGA) Intellectual Property (IP) and Software

FPGA for Beginners with Development Boards from Digilent®

Hundreds of FPGA Projects on Instructables

FPGA Fundamentals from NI(National Instruments)

Getting Started With LabVIEW FPGA from NI(National Instruments)

Programming and FPGA Basics - INTEL® FPGAS

Intel FPGA Training Program

FPGA Courses on Coursera

FPGA Courses on Udemy

FPGA Online Training Courses on LinkedIn Learning

UMass Lowell’s Graduate Certificate in Field Programmable Gate Arrays(FPGA)

FPGA Design Fundamentals Course (UC San Diego Extension)

FPGA II Course (UC San Diego Extension)

FPGAs & SoCs Training from Microsemi

DSP fundamentals for FPGAs course from MATLAB and Simulink Training

Verilog Courses on Coursera

FPGA Tools

LabVIEW FPGA is a software add-on for LabVIEW that you can use to more efficiently and effectively design FPGA-based systems through a highly integrated development environment, IP libraries, a high-fidelity simulator, and debugging features.

Apio is a multiplatform toolbox, with static pre-built packages, project configuration tools and easy command interface to verify, synthesize, simulate and upload your verilog designs.

IceStorm is a project that aims at documenting the bitstream format of Lattice iCE40 FPGAs and providing simple tools for analyzing and creating bitstream files.

Icestudio is a visual editor for open FPGA boards. Built on top of the Icestorm project using Apio.

FuseSoC is an award-winning package manager and a set of build tools for HDL (Hardware Description Language) code and FPGA/ASIC development.

OpenWiFi is an open-source IEEE802.11/Wi-Fi baseband chip/FPGA design.

PipeCNN is an OpenCL-based FPGA Accelerator for Large-Scale Convolutional Neural Networks (CNNs). Currently, there is a growing trend among developers in the FPGA community to utilize High Level Synthesis (HLS) tools to design and implement customized circuits on FPGAs.

Verilator is an open-source SystemVerilog simulator and lint system.

Verilog to Routing(VTR) is a collaborative project to provide a open-source framework for conducting FPGA architecture and CAD Research & Development. The VTR design flow takes as input a Verilog description of a digital circuit, and a description of the target FPGA architecture.

PlatformIO is a professional collaborative platform for embedded development with no vendor lock-in. It provides support for multiplatforms and frameworks such as IoT, Arduino, CMSIS, ESP-IDF, FreeRTOS, libOpenCM3, mbed OS, Pulp OS, SPL, STM32Cube, Zephyr RTOS, ARM, AVR, Espressif (ESP8266/ESP32), FPGA, MCS-51 (8051), MSP430, Nordic (nRF51/nRF52), NXP i.MX RT, PIC32, RISC-V.

PlatformIO for VSCode is a plugin that provides support for the PlatformIO IDE on VSCode.

Tock is an embedded operating system designed for running multiple concurrent, mutually distrustful applications on Cortex-M and RISC-V based embedded platforms. Tock’s design centers around protection, both from potentially malicious applications and from device drivers.

OpenTimer is a High-Performance Timing Analysis Tool for VLSI Systems.

LLVM is a library that has collection of modular/reusable compiler and toolchain components (assemblers, compilers, debuggers, etc.). With these components LLVM can be used as a compiler framework, providing a front-end(parser and lexer) and a back-end (code that converts LLVM’s representation to actual machine code).

TinyGo is a Go compiler(based on LLVM) intended for use in small places such as microcontrollers, WebAssembly (Wasm), and command-line tools.

Chipyard is an open source framework for agile development of Chisel-based systems-on-chip. It will allow you to leverage the Chisel HDL, Rocket Chip SoC generator, and other Berkeley projects to produce a RISC-V SoC with everything from MMIO-mapped peripherals to custom accelerators.

The Eclipse Embedded CDT is a collection of plug-ins for Arm & RISC-V C/C++ developers. Unicorn is a lightweight, multi-platform, multi-architecture CPU emulator framework(ARM, AArch64, M68K, Mips, Sparc, X86) based on QEMU.

Keystone is a lightweight multi-platform, multi-architecture(Arm, Arm64, Hexagon, Mips, PowerPC, Sparc, SystemZ & X86) assembler framework.

Reko is a decompiler for machine code binaries.

Renode is Antmicro’s virtual development framework for multinode embedded networks (both wired and wireless) and is intended to enable a scalable workflow for creating effective, tested and secure IoT systems.

Diosix is a lightweight, secure, multiprocessor bare-metal hypervisor written in Rust for RISC-V.

Verilog/SystemVerilog Development

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Verilog/SystemVerilog Learning Resources

Verilog is a Hardware Description Language(HDL) used to design and document electronic systems. Verilog HDL allows designers to design at various levels of abstraction.

SystemVerilog is an extension of Verilog with many of the verification features that allow engineers to verifythe design using complex testbench structures and random stimuli in simulation.

Verilog Book Shelf

Verilog HDL Basics training from Intel

SystemVerilog for Design and Verification

Verilog HDL Programming Courses on Udemy

Top Verilog Programming Courses on Coursera

Verilog course for Engineers on Technobyte

Verilog Tutorials and Courses on hackr.io

Designing With Verilog Certification from the Xilinx Learning Center

Learning Verilog for FPGA Development on LinkedIn Learning

SystemVerilog tutorial on ChipVerify

Verilog/SystemVerilog Tools

Apio is a multiplatform toolbox, with static pre-built packages, project configuration tools and easy command interface to verify, synthesize, simulate and upload your verilog designs.

IceStorm is a project that aims at documenting the bitstream format of Lattice iCE40 FPGAs and providing simple tools for analyzing and creating bitstream files.

Icestudio is a visual editor for open FPGA boards. Built on top of the Icestorm project using Apio.

EDA Playground is a online code for programming your Verilog projects.

PlatformIO is a professional collaborative platform for embedded development with no vendor lock-in. It provides support for multiplatforms and frameworks such as IoT, Arduino, CMSIS, ESP-IDF, FreeRTOS, libOpenCM3, mbed OS, Pulp OS, SPL, STM32Cube, Zephyr RTOS, ARM, AVR, Espressif (ESP8266/ESP32), FPGA, MCS-51 (8051), MSP430, Nordic (nRF51/nRF52), NXP i.MX RT, PIC32, RISC-V.

PlatformIO for VSCode is a plugin that provides support for the PlatformIO IDE on VSCode.

Chisel is a hardware design language that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs. Chisel adds hardware construction primitives to the Scala programming language, providing designers with the power of a modern programming language to write complex, parameterizable circuit generators that produce synthesizable Verilog.

Clash compiler is a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell. The Clash compiler transforms these high-level descriptions to low-level synthesizable VHDL, Verilog, or SystemVerilog.

Verilator is an open-source SystemVerilog simulator and lint system.

Verilog to Routing(VTR) is a collaborative project to provide a open-source framework for conducting FPGA architecture and CAD Research & Development. The VTR design flow takes as input a Verilog description of a digital circuit, and a description of the target FPGA architecture.

Cascade is a Just-In-Time Compiler for Verilog from VMware Research. Cascade executes code immediately in a software simulator, and performs compilation in the background. When compilation is finished, the code is moved into hardware, and from the user’s perspective it simply gets faster over time.

OpenTimer is a High-Performance Timing Analysis Tool for VLSI Systems.

Assembly Development

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Learn Risc-V Assembly Programming

Assembly Learning Resources

Assembly is a low-level programming language. It uses mnemonic codes and labels to represent machine-level code with each instruction corresponding to just one machine operation.

RISC-V Foundation is a non-profit corporation controlled by its 500 members(NVIDIA, Google, Samsung, Raspberry Pi, SiFive, Canonical, and Western Digital) to drive forward the adoption and implementation of the free and open RISC-V instruction set architecture (ISA).

Intel® 64 and IA-32 Architectures Software Developer’s Manual

Introduction to x64 Assembly from Intel

x86 Assembly Language Reference Manual for Open Solaris

AMD64 Architecture Programmer’s Manual Volume 1-5

AMD GPU ISA documentation

AMD Developer Guides, Manuals, and ISA Documents

Assembler language from IBM

The Assembler language on z/OS from IBM

MIPS Architecture & Technology from Wave Computing

Assemblies in .NET

Microsoft Macro Assembler reference

Compiler Intrinsics and Assembly Language from Microsoft

x86 and amd64 instruction Reference

Intro to x86 Assembly Language Programming

Learn Assembly Programming courses on Udemy

Assembly Languages and Assemblers courses on Coursera

Intro to Assembly Language from MIT

Assembly Tools & Architectures

Arm Instruction Emulator (ArmIE) is a tool that emulates Scalable Vector Extension (SVE) and SVE2 instructions on AArch64/ARM64 platforms.

FASM (flat assembler) is an assembler for x86 processors that supports Intel-based assembly language on the IA-32 and x86-64 computer architectures.

Microsoft Assembler (MASM) for x64 is Microsoft’s assembler that accepts x64 assembler language.

MASM/TASM is a VSCode extension that offers a way to run and debug DOS(80x86) assembly TASM/MASM through DOSBox and msdos-player.

NASM is an asssembler/disassembler for the x86 CPU architecture portable to nearly every modern platform, and with code generation for many platforms old and new.

GAS is the assembler used by the GNU Project for the default back-end of GCC. It is used to assemble the GNU operating system and the Linux kernel.

MIPS is a reduced instruction set computer (RISC) instruction set architecture (ISA) developed by MIPS Technologies, Inc.. In June 2018 MIPS was Acquired by AI Startup Wave Computing.

LLVM is a library that has collection of modular/reusable compiler and toolchain components (assemblers, compilers, debuggers, etc.). With these components LLVM can be used as a compiler framework, providing a front-end(parser and lexer) and a back-end (code that converts LLVM’s representation to actual machine code).

TinyGo is a Go compiler(based on LLVM) intended for use in small places such as microcontrollers, WebAssembly (Wasm), and command-line tools.

Tock is an embedded operating system designed for running multiple concurrent, mutually distrustful applications on Cortex-M and RISC-V based embedded platforms. Tock’s design centers around protection, both from potentially malicious applications and from device drivers.

PlatformIO is a professional collaborative platform for embedded development with no vendor lock-in. It provides support for multiplatforms and frameworks such as IoT, Arduino, CMSIS, ESP-IDF, FreeRTOS, libOpenCM3, mbed OS, Pulp OS, SPL, STM32Cube, Zephyr RTOS, ARM, AVR, Espressif (ESP8266/ESP32), FPGA, MCS-51 (8051), MSP430, Nordic (nRF51/nRF52), NXP i.MX RT, PIC32, RISC-V.

PlatformIO for VSCode is a plugin that provides support for the PlatformIO IDE on VSCode.

Keystone is a lightweight multi-platform, multi-architecture(Arm, Arm64, Hexagon, Mips, PowerPC, Sparc, SystemZ & X86) assembler framework.

Unicorn is a lightweight, multi-platform, multi-architecture CPU emulator framework(ARM, AArch64, M68K, Mips, Sparc, X86) based on QEMU.